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filingDate 1999-05-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 1999-11-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber EP-0959505-A2
titleOfInvention Method for planarising the device topography on solid state imagers
abstract An improved and simplified process for reducing the topographynwithin a solid state imager by using a single coat, expose, and developmentnsequence to produce a transparent layer that fills in the topographic featuresnsurrounding the photoactive area while also planarizing the photoactive area. Thentopography within an imaging device is reduced by application of a transparentnpatternable layer to a semiconductor substrate having a plurality of image sensorsnwith topographic features including structures in the photoactive area and in thenperiphery around the photoactive area including metal wiring and bond padsnfollowed by a patterning step of this first layer by patternwise activating exposure.nThe result after pattern development is that the transparent layer is removed onlynfrom those areas with topographic features that are substantially higher than thensurrounding area and the bond pads. This layer also remains over the photoactivenarea to serve as a planarizing layer. At this point, a CFA and/or lenslets may benformed over the photoactive area and the uniformity of the coating will bensubstantially improved over the uniformity obtained using planarizing layersnwithin the prior art.
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