http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0899742-A1

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filingDate 1997-08-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_298c4e2aeb7628b59999abe26dbe56b9
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publicationDate 1999-03-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber EP-0899742-A1
titleOfInvention Method and circuit for generating a gate voltage in non-volatile memory devices
abstract The present invention relates to a circuit for generating a regulated voltage (RV), in particular for gate terminals of non-volatile memory cells of the floating gate type, which comprises a generator circuit (OSC,CHP) adapted to generate an unregulated voltage (VCHP) on its output, a comparator circuit coupled to the output of the generator circuit (OSC,CHP), including a reference element consisting of a non-volatile memory cell (REFC) of the floating gate type and adapted to output an electric error signal (ID) tied to the difference between the unregulated voltage (VCHP) and the threshold voltage of the cell (REFC), and a regulator circuit (CSEL,CBIAS,IVC,DRV,TR) coupled to the output of the comparator circuit and operative to regulate the unregulated voltage (VCHP) based on the value of the electric error signal (ID). Through the present circuit, the regulated voltage (RV) is made programmable and tied to the parameters of the memory cell (REFC). <IMAGE>
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6429634-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1729302-B1
priorityDate 1997-08-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 28.