http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0896369-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_14ba71eccbb5f65a22b78f39b3c6ffc3 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-30 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 |
| filingDate | 1997-08-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_983ac3ba903f7b5d6a017e24b5b7c7c0 |
| publicationDate | 1999-02-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-0896369-A1 |
| titleOfInvention | Process for realizing cross-point memory devices with cells having a source channel which is self-aligned to the bit line and to the field oxide |
| abstract | The invention relates to a process of manufacturing cross-point matrix memory devices which have floating gate memory cells having the source channel self-aligned to the bit line and the field oxide. The process comprises the steps of: growing a thin layer (3) of tunnel oxide on the matrix region; depositing a stack structure comprising a first conductive layer (4), an intermediate dielectric layer (5), and a second conductive layer (6); photolithographing with a Poly1 mask to define a plurality of parallel floating gate regions (13) in said stack structure; self-aligned etching of said stack structure (4,5,6), above the active areas, to define continuous bit lines; implanting, to confer predetermined conductivity on the active areas (10). Advantageously, the self-aligned cascade etching step for removing parallel strips from multiple layers, down to the active areas of the substrate (1), is discontinued before the field oxide (2) is removed, and the implantation step is carried out in the presence of field oxide (2) over the source active areas (10). <IMAGE> |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0975066-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0975066-A2 |
| priorityDate | 1997-08-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 16.