| abstract |
A solid state relay composed of a series connected pair ofnLDMOSFETs has a minimized output capacitance. Each LDMOSFETnis configured to have a silicon layer of a first conductive type, a drainnregion of the first conductive type diffused in the top surface of thensilicon layer, a well region of a second conductive type diffused in thensilicon layer in a laterally spaced relation from the drain region, and ansource region of the first conductive type diffused within the well regionnto define a channel extending between the source region and anconfronting edge of the well region along the top surface of the siliconnlayer. Each LDMOSFET is of an SOI (Silicon-On-Insulator) structurencomposed of a silicon substrate placed on a supporting plate, a buriednoxide layer on the silicon substrate, and the silicon layer on the buriednoxide layer. The well region is diffused over the full depth of thensilicon layer to have its bottom in contact with the buried oxide layer, sonthat the well region forms with the silicon layer a P-N interface only at ansmall area adjacent the channel. Because of this reduced P-N interfacenand also because of the buried oxide layer exhibiting a much lowerncapacitance than the silicon layer, it is possible to greatly reduce a drain-sourcencapacitance for minimizing the output capacitance of the relay innthe non-conductive condition. |