http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0684551-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_040ec81c891acc3f3186f56cb99cf161 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-3877 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-16 |
| filingDate | 1995-05-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ed5741043eae462834054ea3a03fd787 |
| publicationDate | 1995-11-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-0684551-A1 |
| titleOfInvention | Electronic circuit for use with a coprocessor |
| abstract | A processor (1) and coprocessor (2) architecture is proposed in which the commissioning of the coprocessor is carried out on a cycle immediately following the decoding (6) of an instruction code by recognition during this decoding that this instruction is an instruction which must be executed by the coprocessor. The additional decoding of the instruction makes it possible not to waste time for the configuration of the coprocessor. This type of architecture is particularly interesting for digital processing processors responsible for performing certain specific operations, in particular in audio processing. |
| priorityDate | 1994-05-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 16.