| abstract |
A program controlled reduction processor having a structure and adapted to reduce said structure to a number of reduction steps including different types of reduction. A first order processor of this type includes active memory (1, 2) comprising in turn a) a plurality of active memory cells, each capable of storing information, which could lead to reduction. b) A communication network communicating the result of each reduction to all cells having a connection to said result. Said processor comprises a control device (6) common to all the memory cells. Preferably, at least one of the memory cells, called central cell (2) or arithmetic unit of structure is capable of performing all kinds of reductions and the rest of said cells, called object memory cells, is capable of performing only limited parts of some of the discount types. Further, multiple reduction processors could be connected to each other by a network, thus forming a higher order reduction processor. |