abstract |
A video display system comprises a first video signal source (304) of a first picture and a second video signal source of a second picture. A first signal processor (304) speeds up the first video signal. The second video signal (306) is vertically synchronized with the first video signal. The second video signal is delayed by a fraction of a field period in a field memory. A second signal processor (306) speeds up the synchronized second video signal. The first and second video signals are combined for side-by-side display of the pictures. If the first and second display format ratios are each approximately 4:3 and the third display format ratio is approximately 16:9, each of the side-by-side pictures can be displayed in a format display ratio of approximately 8:9. If each of the video signals is speeded up by approximately 4/3 and cropped horizontally by approximately 1/3, each of the side-by-side pictures is displayed substantially without aspect ratio distortion. |