| abstract |
Circuit used for compressing and decompressing video data and comprising a first in first out line memory (356) and an interpolator (337). A synchronization circuit (339) generates control signals for recording data in the line memory (356) and for reading data from the line memory (356) for compression and compression. data expansion. The interpolator (337) smoothes the compression or decompression data in the first in first out line memory (356). A switching network (325, 327, 353) selectively establishes a first signal path in which the line memory (356) precedes the interpolator (337) for implementing data decompression, as well as a second signal path in which the interpolator (337) precedes the line memory (356) for the implementation of data compression. The switching network (325, 327, 333) is controlled, for example by a microprocessor, depending on the compression or decompression required by the selected display formats. |