http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0497871-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1e70c0aeade92d7571d955d3b90ea06e |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-068 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-0306 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-107 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-0017 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-092 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-4667 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-03 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-09 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-46 |
| filingDate | 1990-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_321093f2c824e8ced2e32b2749008f98 |
| publicationDate | 1992-08-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-0497871-A1 |
| titleOfInvention | Method of manufacturing a multilayered circuit board |
| abstract | The method for manufacturing a multilayer circuit board comprises the following steps: (a) laminating an insulating sheet on a lower layer (2) which reflects laser light applied through the insulating sheet (4 and 6), said insulating sheet comprising a carrier film (4) and an insulating layer (6) formed on the carrier film; (b) forming vias (8) between the layers in predetermined portions of said insulating sheet by the application of laser light; (c) filling a conductive material (10) in the interconnection holes formed in said insulating sheet; (d) forming a circuit-shaped layer (12) on said insulating sheet with the vias filled with conductive material; (e) repeating steps (a) to (c) on an upper insulating sheet and repeating steps (a) to (d) until a desired number of circuit-configuration layers are formed under said insulating sheet , in the case where the plate has at least two layers in circuit configuration; and (f) baking the layers of the multilayer structure formed in step (e) at the same time. |
| priorityDate | 1989-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID154082510 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID431905389 |
Total number of triples: 21.