Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5547f741b25666fc4ae5195cf71a979b |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-456 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53257 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41725 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0266 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-45 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02 |
filingDate |
1991-08-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fd235d117a480b18ed63280e871fc414 |
publicationDate |
1992-02-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
EP-0471310-A1 |
titleOfInvention |
MOS-type semiconductor integrated circuit device |
abstract |
In the semiconductor integrated circuit device of the present invention which uses MOSFETs as its components, the gate electrode of the MOSFET is constructed by using a silicide gate, a polycide gate or a metal gate. The source-drain region of the MOSFET for the internal circuit which does not require connection to an external circuit has the salicide structure, and the source-drain region of the MOSFET for the buffet circuit which requires a direct connection to an external device has a region which is not of salicide structure at least in a portion adjacent to the gate electrode. The gate electrode and the source-drain region of the internal circuit become to have low resistances so that it is possible to realize an increase in the operating speed by using them as a part of the wirings. Further, in the source-drain region of the buffer circuit there is provided a region of high resistance in the vicinity of the gate electrode so that it is possible to enhance the ESD resistance. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0923133-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0734067-A2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0734067-A3 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109599387-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109599387-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6222710-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6274908-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-2034518-A3 |
priorityDate |
1990-08-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |