| abstract |
A multi-layer semiconductor device comprising: a stacked wafer body (7) consisting of a plurality of sets (4) of two semiconductor wafers (1) and a heat sink plate (3) interposed therebetween, an end of the heat sink plate (3) of each set (4) of wafers being exposed at at least one of the side surfaces of the stacked wafer body (7), there being an intermediate connecting circuit (8) provided for connecting circuits in each set of wafers (4), the intermediate connecting circuit (9) being provided on at least one side surface other than the surface at which the ends of the heat skin plates (3) are exposed. |