http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0111053-A2

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filingDate 1983-08-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f732355f0349b90b45ca3726519d30d8
publicationDate 1984-06-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber EP-0111053-A2
titleOfInvention On-chip monitor
abstract Level sensitive scan design (LSSD) scan strings on an integrated digital logic circuit chip (24) are employed for multiple functions of providing control parameters to logic blocks (110) on the chip (24), and for providing reconfiguration messages to reconfiguration logic (225) on the chip, in addition to the normal function of transferring test data to various portions of the chip. This reduces the number of input/output pads on the integrated circuit chip which must be dedicated to these functions.
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0303065-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0196171-A2
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0196171-A3
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0209982-A2
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0578540-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0336435-A2
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0336435-A3
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0209982-A3
priorityDate 1982-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 42.