http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0029855-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9fc0a00eab3a757e8324b1e887d7ba97 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-066 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-102 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-32 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C17-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-32 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-78 |
| filingDate | 1980-12-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8b0f7ee444fbfb10bcfc1bbe837d3197 |
| publicationDate | 1981-06-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-0029855-A1 |
| titleOfInvention | MICROCOMPUTER WITH MPU FOR ELECTRICAL PROGRAMMABLE FIXED MEMORY. |
| abstract | A microcomputer with a single microchip includes a central processing unit (1) (CPU), a memory with selective access (2) (RAM), an erasable and programmable read only memory (3) (EPROM), a timer (4), 1/0 communication logic in series, four 1/0 access points (11-14) and an input pin to produce a RESET signal or a programming potential (Vpp ) (23). An EPROM command register (53) in the CPU can be loaded under the control of a computer program stored in an external memory. In response to a first bit in the EPROM command register, a buffer / lock address (61) and a data lock (62) temporarily lock address and data information during the write operation on the EPROM. In response to a second bit in the EPROM command register, the programming potential is applied to the EPROM for a predetermined time to program the data information in the EPROM on its associated address. The accuracy of the programming operation can be checked by using the CPU under the control of an external computer program to compare the address and data information programmed in the EPROM with the original sources of this information. |
| priorityDate | 1979-06-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.