http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0019886-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_4ddcb273a108a5d8472b335280098e06 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-105 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0883 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0466 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-105 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8246 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-112 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 |
| filingDate | 1980-05-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_188bd3afeb1f69075a4e047c6ff272cd http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3d16fc658abc7b62d41edf3b3b8fc226 |
| publicationDate | 1980-12-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-0019886-A1 |
| titleOfInvention | Semiconductor memory |
| abstract | The invention has for its object to provide a semiconductor memory which is applied with the associated edge electronics on a silicon chip, in which the formation of parasitic semiconductor components is prevented, which works with write and erase voltages as small as possible, in which the reprogramming with voltages of one polarity is possible, the technology of which can largely be derived from the 5-volt n-channel silicon gate technology, in which enhancement and depletion transistors are possible side by side, in which the cell structures have a minimal area requirement and in which the circuit produced in this way CMOS and TTL is compatible.n n n According to the invention, the semiconductor memory consists of MOS field-effect transistors which are applied as an integrated circuit on a silicon chip in such a way that both the memory matrix and the associated peripheral electronics are accommodated on the same chip, a further p-doped silicon substrate being applied epitaxially on an n-doped silicon substrate is and in the epitaxially applied p-doped silicon substrate memory transistors with a variable threshold on the one hand and logic transistors on the other hand are introduced such that the substrate of the memory transistors is separated from that of the logic transistors by an n + - doped zone, the isolation ring, so that the Insulation ring the entire epitaxially applied n n n te p-doped substrate up to the n-doped silicon substrate is penetrated in that narrow, near-surface p + -doped regions are introduced into the p-doped silicon substrate, some of which act as so-called channel stoppers, while the others come out of the isolation ring into those Protruding into the substrate part, which is equipped with memory transistors, that there are surface contacts that connect the insulation ring and the other narrow, near-surface p + -doped regions, that doping of different strengths are still applied by means of field implantation under the field areas between different memory cells in the semiconductor material, so that the formation of parasitic semiconductor components is weakened or prevented that an insulator consisting of a layer sequence of silicon oxide, silicon nitride and silicon oxide is used as the gate insulator in the memory transistors that Po as material for the memory gates lysilicon is used and that the memory transistors have a split gate structure.n n n Application for the production of non-volatile memories. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-3316675-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-8404852-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0716454-A3 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0716454-A2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0138439-A3 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0138439-A2 |
| priorityDate | 1979-05-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 50.