| abstract |
An electronic component comprising: a substrate having a first major surface on one side and a second major surface on the other side; a chip having a first chip major surface on one side and a second major chip surface on the other side and a plurality of electrodes disposed on the first A sealing insulating layer sealing the chip on the first major surface of the substrate so as to expose the second major surface of the substrate, the sealing surface being at least one of the chip surface and the second chip major surface Insulating layer has a sealing major surface opposite to the first major surface of the substrate; and a plurality of external terminals configured to penetrate the sealing insulating layer so as to be exposed from the sealing major surface of the sealing insulating layer, the external terminals being respectively electrically connected to the plurality of electrodes of the chip. |