http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-19854730-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_05a31d15146049253ebe5354fed884ea |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0297 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3648 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-027 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3685 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-36 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3688 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3614 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36 |
| filingDate | 1998-11-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e3270fcaf2e142489fb4725899f8eca1 |
| publicationDate | 1999-09-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | DE-19854730-A1 |
| titleOfInvention | LCD source driver |
| abstract | A liquid crystal display source driver improves the current drive capacity to drive the LCD by converting digital video signals into positive and negative analog video signals to perform a point inversion process for the LCD. By using a single video signal processing path instead of a negative polarity video signal processing path and a positive polarity video signal processing path, the number of components of the source driver is reduced. Furthermore, protective elements in the output terminals of the output buffer are prevented from being supplied with a high instantaneous voltage by charging the last output terminal of the output buffer to a common voltage level of the video signal with positive and negative polarity. The source driver comprises control logic to which an internal polarity control signal and a first clock signal and a second clock signal are supplied, a shift register, a latch block with a plurality of latch memories which receive digital video signals of an odd channel and digital video signals of an even channel, which are output from the control logic and which are synchronized by the enable signals, a negative polarity video signal processor, a positive polarity video signal processor and a switching block with a plurality of switching circuits which carry the analog video signals with negative polarity and the analog video signals. .. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-10224736-B4 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-10259326-B4 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7196685-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-10224564-B4 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7382344-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7477224-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7916110-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7180499-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-10224737-B4 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-10226070-B4 |
| priorityDate | 1998-03-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 50.