http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-19813743-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1072 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-407 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-407 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-22 |
| filingDate | 1998-03-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_965097c71fbd05451429a67fbf9a4ba9 |
| publicationDate | 1999-02-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | DE-19813743-A1 |
| titleOfInvention | Clock shift circuit device and synchronous semiconductor memory device using the same |
| abstract | The memory includes a masking control circuit (25) generating a read-out value masking description signal and containing a shift circuit (25a-c). A resetting section (25d) reacts to deactivation of a clock activating signal (ENA), defining generating time period of internal column clock signal, for resetting the shift circuit into a starting state for generating a correct, internal masking description signal. |
| priorityDate | 1997-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID448688621 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID23616742 |
Total number of triples: 17.