| abstract |
The device has a scalar processor (210), a vector processor (220), for linear transformation of the video data, a bit stream processor (245) for compression of the output from the vector processor, or decompression of the video data input signal fed to the input of the vector processor. A control circuit (210) synchronises the operation of the vector processor and the bit stream processor. The bit stream processor is interrupted by the control circuit to halt processing of a first bit stream and start processing of a second bit stream, with parallel processing of both bit streams, for real-time coding or decoding of two streams of video data. The vector processor is programmed to execute single arithmetic or boolean commands. |