http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-19649500-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ec5b8c0fc1f827c1360a8f5ea5652225 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N60-128 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7832 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-772 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-8083 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-808 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L39-22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-772 |
| filingDate | 1996-11-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2a0a9e00e82ae78864aa941ba20fda98 |
| publicationDate | 1997-10-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | DE-19649500-A1 |
| titleOfInvention | Hybrid electronic device, especially Josephson transistors |
| abstract | The device has flat areas of high (11) and low (12) flat areas each having an Nbs, and are provided on a p-InAs main body (10). The flat areas has steps each having a side area provided in horizontal directions. The p-InAs main body has a continuous inversion channel (14), which is provided under the high flat area, and prolonged along with the side area. A first superconductive layer is provided on the high flat area which has a thickness thinner than the height of the side area. A second superconductive layer is provided on the low flat area in which an electronic-conduction channel is formed between Nb through the inversion channel. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-19757566-A1 |
| priorityDate | 1995-11-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 28.