http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-112018000209-B4
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a46a0b9145b42c32c20fcc2b29d4e21a |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4236 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-862 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7806 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-404 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1037 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-407 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1095 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0634 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7813 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate | 2018-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2020-02-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9408e687b910c047c6efc53431fcf155 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_751f8d04c9b7d2b0ced78f883bb6d44d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1536c486a9ecd67719aa5bf5a621ff62 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d9fbc4dd1224d5d2011e43e90e912b57 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ef6d8608496252a8bfdbc5577c206508 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5f5df65215389bce72d631d7e7ed7ff2 |
| publicationDate | 2020-02-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | DE-112018000209-B4 |
| titleOfInvention | GRAB POWER TRANSISTOR |
| abstract | Trench power transistor comprising an n-drain region (31) and an n-drift region (30) located on the n-drain region (31), the n-drift region (30) being provided with at least two p-body regions (33), each of which p-body region (33) is provided with a p-body region contact region (38), a first n-source region (34a) and a second n-source region (34b); a conductive layer (37) located on the p-body region contact region (38), the conductive layer (37) and the p-body region contact region (38) forming a body region contact diode structure, the conductive layer (37) one Is cathode of the body area contact diode structure and the p-body area contact area (38) is an anode of the body area contact diode structure; a gate trench disposed between two adjacent p-body regions (33) and recessed into the n-drift region (30), the gate trench having a dielectric gate layer (35), a first gate (36a) and a second gate (36b) is provided; a first current channel arranged in the p-body region (33) and between the first n-source region (34a) and the n-drift region (30), the first gate (36a) being switched on and off by the first current channel controls a gate voltage; and a second current channel located in the p-body region (33) and between the second n-source region (34b) and the n-drift region (30), the second gate (36b), the first n-source region (34a) , the second n-source region (34b) and the conductive layer (37) are electrically connected and are all connected to a source voltage, the second gate (36b) controls the switching on and off of the second current channel by the source voltage. |
| priorityDate | 2017-11-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 31.