| abstract |
A silicon carbide epitaxial layer (120) comprises: a first impurity region (61) having a first conductivity type; a second impurity region (62) in contact with the first impurity region (61) and having a second conductivity type different from the first conductivity type; and a third impurity region (63) separated from the first impurity region (61) by the second impurity region (62) and having the first conductivity type. A gate insulating film (57) is in contact with the first impurity region (61), the second impurity region (62), and the third impurity region (63). A groove portion (20) is formed in a surface (161) of the first impurity region (61), the surface (161) being in contact with the gate insulating film (57), the groove portion (20) extending in a direction along the Surface (161), wherein a width of the groove portion (20) in the one direction is twice as large or larger than a width of the groove portion (20) in a direction perpendicular to the one direction, wherein a maximum depth of the groove portion (20) of the surface (161) is not more than 10 nm. |