| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-03 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78648
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1259
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66969
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-70 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23C14-34
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-10 |
| filingDate |
2013-04-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_da845e0c0666703c36355238b8206e91 |
| publicationDate |
2015-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
DE-112013002106-T5 |
| titleOfInvention |
Semiconductor device and method of manufacturing the same |
| abstract |
A change in electrical characteristics of a fin-type transistor containing an oxide semiconductor material, such as a negative shift in the threshold voltage or an increase in the S value, is prevented. An oxide semiconductor layer is sandwiched between a plurality of gate electrodes with an insulating layer present between the oxide semiconductor layer and each of the gate electrodes. That is, a first gate insulating layer covers a first gate electrode, an oxide semiconductor layer is in contact with the first gate insulating layer and extends beyond the first gate electrode, and a second gate insulating layer covers at least the oxide gate. Semiconductor layer and a second gate electrode is in contact with a part of the second gate insulating layer and extends beyond the first gate electrode. |
| priorityDate |
2012-04-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |