http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-112005002538-T5
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9d527f9a5c3e991a1797de3518a88d14 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-31928 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04 |
filingDate | 2005-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_604094c168cc91a67631ea485bb25b34 |
publicationDate | 2007-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | DE-112005002538-T5 |
titleOfInvention | Test device and test method |
abstract | A test apparatus for testing the switching speed of a circuit comprising a pre-stage logic element outputting a first or second level voltage and a post-stage logic element to which the output of the pre-logic element is input, comprising: a threshold voltage setting unit for setting a threshold voltage of a post-stage field effect transistor (FET) to be different from that in a normal operation by setting a substrate voltage of the post-stage FET to have a value different from that in FIG normal operation of the circuit; a delay time measuring unit for measuring a delay time of the circuit for which the threshold voltage different from that in the normal operation is set; and an error detecting unit for detecting an error in the switching speed of the circuit based on the delay time, the post-stage logical element having the post-stage FET to which the output signal at a gate terminal is input, for outputting a different level of the voltage according to the case where output voltage ... |
priorityDate | 2004-10-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.