http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-10355148-A1

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filingDate 2003-11-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c8dc2042a5c7f19fe589f3d8df1470f9
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publicationDate 2004-09-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber DE-10355148-A1
titleOfInvention Method and system for performing on-the-fly scanning using minimal cycle delay synchronization
abstract A method and system for on-the-fly sampling of one or more integrated circuit nodes coupled to one or more bus area clocks of an integrated circuit using minimal clock cycle delay synchronization. During-operation sampling circuitry, set-reset circuitry, and metastable suppression circuitry are used to provide sufficient pulse width for during-operation sampling of the one or more nodes when the one or more bus area clocks are asynchronous Require surgery. The during-operation sampling circuitry is also operable to synchronously sample the one or more nodes during operation.
priorityDate 2003-03-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 22.