| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-30604
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76224
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0673
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42392 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2020-06-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f2ffdd1f39723253650c341e69c64334
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e6d3f5cd1d968a1312c678253f85734b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e515380dcc946d7d3a0d3ae13ad4ac33 |
| publicationDate |
2021-06-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
DE-102020115785-A1 |
| titleOfInvention |
SEMICONDUCTOR STRUCTURE AND PROCESS FOR THEIR PRODUCTION |
| abstract |
A semiconductor structure is provided. The semiconductor structure has a first gate-all-around field effect transistor (GAA-FET) over a substrate, the first GAA-FET having first nanostructures and a first gate stack that encloses the first nanostructures. The semiconductor structure also includes a first fin field effect transistor (FinFET) adjacent to the first GAA-FET and having a first fin structure and a second gate stack over the first fin structure. The semiconductor structure also has a gate cutting element which is arranged between the first gate stack of the first GAA-FET and the second gate stack of the first FinFET. |
| priorityDate |
2019-12-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |