http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102016115759-B4
Outgoing Links
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| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_59c820ad08f8533c7440ae1d9235b168 |
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| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate | 2016-08-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2018-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1eaaa4b898d308b38fcd092395dfd51c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_604314b900d28f949d53601d1c18b9a9 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_663cacd96483bc7aa1b84e9e79e1ad68 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a64dc8d8b34571337acbe88d67493b3c |
| publicationDate | 2018-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | DE-102016115759-B4 |
| titleOfInvention | METHOD FOR PRODUCING A SUPERJUNCTION SEMICONDUCTOR DEVICE AND SUPERJUNCTION SEMICONDUCTOR DEVICE |
| abstract | A method of manufacturing a semiconductor device in a semiconductor body (106) of a wafer, the method comprising: Forming a mask (102) on a surface (104) of a semiconductor body (106), the mask having a plurality of first mask openings (108) in a transistor cell area (110) and a mask opening design (109) outside the transistor cell area (110) the mask opening design (109) comprises a second mask opening (1091) or a plurality of second mask openings (1092) surrounding the transistor cell region (110), the plurality of second mask openings (1092) being smaller than one laterally at lateral distances (d) Width (w) of the plurality of second mask openings (1092) or smaller than a lateral distance between the first mask openings (108) are arranged, Forming a plurality of first trenches in the semiconductor body at the first mask openings and forming one or a plurality of second trenches at the one or more second mask openings; Filling the first trenches (111) and the one or more second trenches (1121, 1122) with a filler material (124) comprising at least one semiconductor material, and further comprising Forming a source contact on a first side of the semiconductor body (106), forming a drain contact on a second side of the semiconductor body (106), and forming a drain ring structure (164) in an area outside the transistor cell area (110) on the first side and electrically connecting the first side Semiconductor body (106) and the drain ring structure (164), wherein the one or the plurality of second trenches (1121, 1122) is arranged in a region laterally by a dicing line (170) for chip customization and an inner edge (163) of the drain ring structure (164), the inner edge (163) of the drain ring structure (164) being narrower than the transistor cell region (110) as an outer edge (165 ) of the drain ring structure (164). |
| priorityDate | 2016-08-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
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|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID415751214 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID73680 |
Total number of triples: 37.