| abstract |
A semiconductor device structure comprising: a metal gate stack (123) over a semiconductor substrate (100), the metal gate stack (123) comprising a gate dielectric layer (118), a work function layer (120) and a conductive electrode (122 ') surrounded by the work function layer (120), a protective element (126) over the metal gate stack (123), an upper side (126t) of the protective element (126) being wider than an underside (126b) of the protective element (126), an upper surface (122t) of the conductive electrode (122 ' ) is between the upper side (126t) and the lower side (126b) of the protective element (126) and the upper surface (122t) of the conductive electrode (122 ') is at a higher level than that (118t, 120t) of the work function layer ( 120) and the gate dielectric layer (118), a spacer element (106, 108) over a side surface (126s) of the protective element (126) and a side wall of the metal gate stack (123), and a conductive contact (130) electrically connected to a conductive element (112) over the semiconductor substrate (100), the conductive contact (130) being in direct contact with the spacer element (106,108), and a short circuit between the metal gate stack (123) and the conductive contact (130) is prevented. |