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filingDate 2014-06-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_abd08e20deeffb47f2a20cc4972dadbd
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publicationDate 2015-12-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber DE-102014210907-A1
titleOfInvention ASIC component, in particular as a component of a vertically hybrid integrated component
abstract Measures are proposed which serve to stabilize the substructure of the connection areas of ASIC devices. These measures relate to ASIC devices with an ASIC substrate (11), in which electrical circuit functions are integrated, and with an ASIC layer structure (12) on the ASIC substrate (11), the plurality of insulation layers (13) from each other separate and interconnected via metallic plugs wiring levels (14) for the circuit functions comprises. In at least one of the topmost wiring levels (141), at least one connection area (15) is designed for mounting wire bonds or wafer bonding. In order to ensure that the contact pressure applied during the wire or wafer bonding is passed on to the ASIC substrate (11) without damaging the ASIC layer structure (12) and / or the ASIC functions, in the ASIC layer structure (12) at least one warp of vertically aligned metallic plugs (16) extending from the uppermost wiring plane (141) to the ASIC substrate (11) or oxide trenches (17) formed therein, below the connection region (15).
priorityDate 2014-06-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 41.