http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102012022825-B4
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a2bcaf91101a370a3d64e3190366357f |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02E10-50 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02S50-10 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02S50-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66 |
| filingDate | 2012-11-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2014-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e4ddd396d681462da1a0fe6ec51e9587 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0d9e5517737a7cd3330c10924b601337 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_15f6799f7f1ac1eaa3f75d3eec524371 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_166b1914f2d7d4b7a514ac2c7e1b92ac |
| publicationDate | 2014-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | DE-102012022825-B4 |
| titleOfInvention | Method for testing the susceptibility to potential-induced degradation of components of solar modules |
| abstract | A method for testing the potential-induced degradation susceptibility of solar cell components of solar cell components comprising a semiconductor body (15) having a dielectric layer deposited thereon and one or more electrical contacting metallizations (18), wherein At least the semiconductor body (15) of the solar cell with the dielectric layer applied thereon is placed on a plane metal support (3) in order to obtain a full-area electrical contact of the semiconductor body (15) with the metal support (3), - Placed over the dielectric layer, a polymer film (16) and a stamp (7) with a flat metallic contact surface on the layer stack of the semiconductor body (15), the dielectric layer and the polymer film (16) and optionally further applied components pressed or placed becomes, - or a stamp (7) having a planar metallic contact surface, on which a polymer film (16) and optionally further components are applied, is pressed onto the layer stack of the semiconductor body (15) and the dielectric layer is applied, The layer stack is brought to a test temperature via a heating device (4) integrated into the metal support (3) or attached to the metal support (3) and kept at this temperature for a test period, - Continuously or repeatedly applied between the metallic contact surface of the punch (7) and the metal support (3) over the examination period, an electrical voltage, and A measure of a potential-induced degradation of the semiconductor body with dielectric layer (15) is determined at the end or after the end of the test period. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101831048-B1 |
| priorityDate | 2012-11-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.