http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102009042711-B4
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_59c820ad08f8533c7440ae1d9235b168 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1095 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0619 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66734 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7397 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0834 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0653 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7813 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7811 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-407 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-739 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76 |
| filingDate | 2009-09-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2020-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a64dc8d8b34571337acbe88d67493b3c |
| publicationDate | 2020-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | DE-102009042711-B4 |
| titleOfInvention | Channel stop trench semiconductor devices and processes |
| abstract | A semiconductor component comprising: a semiconductor substrate (2) having a first surface (11), an active region (AA) and a peripheral region (PA); at least one channel stop trench (40) formed in the semiconductor substrate (2), the channel stop trench (40) extends from the first surface (11) at least partially into the semiconductor substrate (2) and is arranged between the active region (AA) and the peripheral region (PA); at least one electrode (41) arranged in the channel stop trench (40); a peripheral contact region (14) of the semiconductor substrate, which is arranged in the peripheral region (PA) on the first surface (11) of the semiconductor substrate (2); a conductive layer (15), in electrical contact with the electrode (41) arranged in the channel stop trench (40) ) and formed in electrical contact with the peripheral contact region (14), the conductive layer (15) being electrically connected to the semiconductor substrate (2) in the peripheral region (PA) and is electrically isolated from the semiconductor substrate (2) in the active area (AA); anda chipping stop trench (46) formed in the semiconductor substrate, the chipping stop trench (46) being arranged in the peripheral region (PA) between the channel stop trench (40) and the peripheral contact region (14). |
| priorityDate | 2008-09-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.