| abstract |
The invention relates to a fuse arrangement with a plurality of fuses (55) formed on a base (51, 53), to an associated manufacturing method and to a method for producing an associated semiconductor component. In accordance with the present invention, fusible link insulating walls (IW) are formed between the fuses, each including a lower and an upper fuse isolation pattern (57W, 59W). Use z. B. for fuse arrangements in semiconductor memory devices. |