http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-217847956-U
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f0541bad5a6c5fa6d9dc51284e2f5303 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a62555ff12316a9a118542896b4c0af7 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-32 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-3233 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12 |
| filingDate | 2021-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2022-11-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_add647392647498e4158945be7ab82ef http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7b499784da5fc69ff8ffeea88b8845fd http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bcb325db9eca239b2c62ae350a706d37 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e18a8894b1add179332d282cab002de4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0cf21f254a5ac90e46deada50aa6ec0c |
| publicationDate | 2022-11-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-217847956-U |
| titleOfInvention | Display substrate, display panel and display device |
| abstract | Provided are a display substrate, a display panel and a display device. The display substrate includes a display pixel area and a first dummy pixel area, a plurality of dummy sub-pixel structures arranged on the base substrate and located in the first dummy pixel area, at least one dummy sub-pixel structure includes a first compensation capacitor and a second compensation capacitor . The first scanning signal line is electrically connected to the gate of the fourth transistor of the pixel driving circuit of each sub-pixel in a row of sub-pixels, and the first scanning signal line is also electrically connected to the first compensation capacitor of at least one dummy sub-pixel structure. The second scanning signal line is electrically connected to the gate of the second transistor of the pixel driving circuit of each sub-pixel in a row of sub-pixels, and the second scanning signal line is also electrically connected to the second compensation capacitor of at least one dummy sub-pixel structure. |
| priorityDate | 2021-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.