http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-217363059-U

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b7756ec141716aa71a009b74208e19d7
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-38
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-10
filingDate 2022-04-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2022-09-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9c318bf41e35e679b57da74eaf21cbb5
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_40ab9b77b16c7c7d2b6aa9c81de58c4b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3063f28bf970aed660eef60671c5235a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d18d183545a376c34d4c4d84d1ff7aee
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_25d090bb2a5f17ec00d5e6c10ef075c2
publicationDate 2022-09-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-217363059-U
titleOfInvention A Timeout Monitoring Circuit Applied in Successive Approximation Analog-to-Digital Converter
abstract The utility model provides a time-out monitoring circuit applied in the successive approximation analog-to-digital converter. When a rising edge of a CNV signal is generated externally, the analog-to-digital converter of the present application enters the successive approximation process, and the Q N end of the flip-flop DFF1 becomes low, the N-type MOS transistor MN1 is turned off, the P-type MOS transistor MP1, P-type MOS transistor MP2 and P-type MOS transistor MP3 flow a tiny current to charge the capacitor C1. After a period of time, the inverter INV1 The input terminal becomes high, the output terminal of the NOR gate NOR1 also becomes high, the flip-flop DFF1 is reset, and the analog-to-digital converter re-enters the sampling process. By adjusting the capacitance value of C1 reasonably, the charging time of C1 is slightly longer than the analog-to-digital converter. The time required for the normal successive approximation process can be forced to reset after the quantization timeout of the analog-to-digital converter, and at the same time, the present application can also avoid abnormal states caused by power-on errors.
priorityDate 2022-04-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID426135032
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID7156993

Total number of triples: 18.