http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-215119537-U
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b64c99d91157563abb6d7d08cee9041c |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-024 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-18305 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-026 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-183 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-0234 |
| filingDate | 2021-05-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2021-12-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0381a4adee3941c01572e0e4472ecbbd http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f6d0050b56712cca19c8b2e35c2ab783 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e13ea7ce75646e449d132db878abc06b |
| publicationDate | 2021-12-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-215119537-U |
| titleOfInvention | Vertical cavity surface emitting laser having flip-chip structure, and vertical cavity surface emitting laser array |
| abstract | The utility model provides a vertical cavity surface emitting laser, vertical cavity surface emitting laser array that possess flip-chip structure, VCCEL include the substrate, set up in first mirror layer on the substrate, set up in active layer on the first mirror layer with set up in second mirror layer on the active layer, set up the molybdenum metal layer on the second mirror layer, the second mirror layer with be provided with electrode layer on between the molybdenum metal layer, the substrate with be provided with the etching stop layer between the first mirror layer, the etching stop layer material is different from the substrate material, the substrate sets up the optical window and is used for light to jet out, just the non-optical window region of substrate sets up the bottom electrode. The array of vcsels includes at least 2 vcsels. The utility model discloses metal heat dissipation layer preparation is simple, and suitable preparation high power array VCCEE L chip. |
| priorityDate | 2020-05-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 24.