http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-212875670-U
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_14ba71eccbb5f65a22b78f39b3c6ffc3 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M1-0009 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M1-0025 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M3-1582 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M3-157 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K5-1565 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M3-158 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M1-08 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02M3-157 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02M3-158 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02M1-08 |
| filingDate | 2020-09-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2021-04-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_72c6acfd93efd6497ddfda52140dd742 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5c0cb034d7d4414a53f8d61e11e02d08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_38f1a78a901489fc080b30fd9608cdfa http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_42d35f17b694fd5f8c9fe0811232d38a |
| publicationDate | 2021-04-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-212875670-U |
| titleOfInvention | DC-DC converter |
| abstract | Embodiments of the present disclosure relate to a dc-to-dc converter, which includes: clock generation circuit means for generating first and second clock signals which are out of phase; and a control signal generator that generates a switching control signal at an edge of the second clock signal based on a comparison of the error voltage and the summation voltage. The boost circuit arrangement charges the energy storage component during an on-phase and discharges the energy storage component during an off-phase to thereby generate an output voltage. The on-phase and the off-phase are set according to the switch control signal. The summing voltage generation circuit arrangement generates a ramp voltage in response to an edge of the first clock signal and generates a summing voltage at an edge of the second clock signal. The sum voltage represents the sum of the ramp voltage and a voltage representing: the current flowing in the energy storage assembly during the turn-on phase. |
| priorityDate | 2019-09-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 44.