http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-207705180-U
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_238881bc8d2b58b20d05c392679a65bc |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-49111 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48472 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-49175 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-373 |
| filingDate | 2017-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2018-08-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d39a621fbab1e0b4a3b4b52dea5a8f15 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b2c7f1e21ca9cc03cc6ae0df2cd562e4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_41e345ea9e6a3147a4396768472f91b8 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ad76d19fd6b9e8a38bfc2ae1e71413d2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a3988a3e44e913d18c33b081e5e8190f |
| publicationDate | 2018-08-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-207705180-U |
| titleOfInvention | A base plate for power module packaging |
| abstract | The utility model discloses a bottom plate for power module packaging, which comprises a main board, a chip and terminals, the chip is welded on the upper end of the main board by soldering, the terminal is connected to the upper end of the main board; the upper surface of the chip is The upper end of the main board is soldered by conductive wires, and the conductive wires are aluminum wires or copper wires. Beneficial effects of the utility model: the bottom plate of the utility model uses the lower copper layer to realize heat dissipation, the middle insulating layer realizes circuit isolation, and the upper layer copper layer realizes circuit connection, the structure is simple, the use and installation are convenient, and the process difficulty can be significantly reduced, and the thermal group can be reduced. The chip needs to be welded once, which reduces the process steps and welding materials, does not require secondary welding, and does not need to design fixtures for positioning, and also reduces process steps and connection materials, reducing process costs and material costs. |
| priorityDate | 2017-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 26.