http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-115196583-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f3de45f37ce6de0844e11be7a1089572 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0c761d3303c708bbcc8e267f01daa706 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00301 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-0032 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00261 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00325 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-007 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-0045 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81C1-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81B7-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81B7-00 |
filingDate | 2022-08-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_53a8fa0b636e9952d0f23b4d9647ab89 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2e4d1356c8e002ccf4809407eed38780 |
publicationDate | 2022-10-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-115196583-A |
titleOfInvention | A fan-out packaging structure and packaging method of a MEMS sensor chip and an ASIC chip |
abstract | The invention discloses a fan-out type packaging structure and packaging method of a MEMS sensor chip and an ASIC chip, which is composed of a MEMS sensor chip, an ASIC chip and an intermediate substrate. The lead bonding area of the ASIC is formed by a re-wiring process to form a fan-out bonding area. The bonding area is soldered to the MEMS sensor chip or electrically connected to the external substrate by printing solder balls. On the other side, the wire bonding area is processed on the other side, which is electrically connected to the external substrate or is connected to the MEMS sensor chip through the flip-chip ball mounting process. There is a stress isolation groove on the interposer substrate to isolate it to avoid thermal loss. Stress problems caused by matching. The structure is suitable for the packaging of the combination of MEMS sensor chips and ASIC chips of different sizes and thicknesses, improves the flexibility of processing, reduces the complexity and difficulty of processing, and can effectively reduce costs and be used for mass production. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-116193972-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-116193972-A |
priorityDate | 2022-08-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Predicate | Subject |
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isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID5461123 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419559541 |
Total number of triples: 25.