| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02D10-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2207-2227 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1084
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-063
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4074
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1045
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0207 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-02 |
| filingDate |
2022-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_147be959b30fe2417eb76ef13ba78f51
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c336e5f49cdfffaf913006a4e21bbcbc |
| publicationDate |
2022-10-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-115148232-A |
| titleOfInvention |
Signal buffer circuit |
| abstract |
The present disclosure relates to a signal buffer circuit. A device having signal lines in a semiconductor device is described. An example apparatus includes: one or more power supply voltage lines in a first conductive layer; a plurality of transistors and signal lines in a second conductive layer. Each transistor of the plurality of transistors includes an active region disposed in a substrate and a gate electrode over the active region. The signal line of the second conductive lines is below the first conductive layer and above the active regions of the plurality of transistors. The signal line is coupled to the gate electrodes of the plurality of transistors. The signal line has a resistance higher than that of the power supply voltage line. |
| priorityDate |
2021-03-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |