http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-115036273-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b5b43f4a86fc8f7ad28689d833acac53 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823481 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B99-00 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8239 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 |
| filingDate | 2022-06-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_39c6aaa0d2f15d459f4df7c7ddd5d2ac |
| publicationDate | 2022-09-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-115036273-A |
| titleOfInvention | Semiconductor structure and method of making the same |
| abstract | The present application relates to a semiconductor structure and a preparation method thereof. A preparation method of a semiconductor structure includes: providing a semiconductor substrate with an isolation trench in the semiconductor substrate, the isolation trench spanning a peripheral area and an array area; forming a first gate material layer in the isolation trench and above the semiconductor substrate, The first gate material layer contains metal ions; the first gate material layer is patterned to obtain a first gate intermediate layer, the first gate intermediate layer is located in the peripheral region and extends from above the semiconductor substrate to In the isolation trench; fill the isolation structure in the isolation trench. The embodiments of the present application can effectively improve the problem of contamination of the array area caused by the structure formed first in the peripheral area during the manufacturing process of the array area. |
| priorityDate | 2022-06-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 27.