http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114783876-A
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-165 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-267 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7848 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7842 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4236 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41775 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6656 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6653 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 |
filingDate | 2022-01-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7759826d278389332cc41d6e97b23bb9 |
publicationDate | 2022-07-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-114783876-A |
titleOfInvention | Semiconductor element and method of manufacturing the same |
abstract | The present disclosure provides a method for manufacturing a semiconductor device, which includes forming a gate dielectric layer and a dummy gate layer; forming a mask on the dummy gate layer; patterning the gate dielectric layer and the dummy gate layer, so as to forming a dummy gate structure, wherein the dummy gate structure includes the residual part of the gate dielectric layer and the residual part of the dummy gate layer; epitaxially growing a first gap layer on the dummy gate structure and the substrate, wherein the first gap The growth rate of the layer on the multiple exposed surfaces of the dummy gate structure and the substrate is higher than that on the multiple exposed surfaces of the mask; doping the first gap layer to form the doped gap layer, wherein the doped gap layer has a lattice constant different from the substrate; depositing a second spacer layer on the doped spacer layer; and etching the second spacer layer and the doped spacer layer to form a gate gap. |
priorityDate | 2021-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 50.