| abstract |
A chip, a semiconductor package and a method for forming a TSV structure, the chip includes a semiconductor substrate, a dielectric structure, an interconnection structure, a TSV structure and a TSV barrier structure. The semiconductor substrate has a front side and an opposite back side. The dielectric structure may include a substrate oxide layer disposed on the front side of the semiconductor substrate and a plurality of interlayer dielectric layers disposed on the substrate oxide layer. The interconnect structure is placed in the dielectric structure. The TSV structure extends vertically from the back side of the semiconductor substrate to the front side of the semiconductor substrate such that the first end of the TSV structure is placed in the dielectric structure. The TSV barrier structure may include a barrier line contacting the first end of the TSV structure and a first sealing ring, the first sealing ring is placed in the substrate oxide layer and surrounds the TSV structure in a lateral direction, and the lateral direction is perpendicular to the vertical direction . |