| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B51-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-2257
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B51-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-2297
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B51-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B51-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-223
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-2255 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11592
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11585
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-1159 |
| filingDate |
2022-03-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ff880cb0324d44bf9c63d2e86b85e7c7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e5ff389dd80821b5c058a51aa0f5b246
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_df2f66e05dda574cecb01e9ac86419ea
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_17e5f695981fbb1cd6827758d0122814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_491dbca39e2e7e022d693611d8836f68 |
| publicationDate |
2022-07-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-114725125-A |
| titleOfInvention |
Semiconductor device, memory device, and method of operating memory device |
| abstract |
A semiconductor device, a memory device, and a method of operating the memory device. The semiconductor device includes a first conductive structure extending in a vertical direction and a second conductive structure extending in a vertical direction. The second conductive structure is spaced apart from the first conductive structure in the lateral direction. The semiconductor device further includes a plurality of third conductive structures, each of which extends in the lateral direction. The third conductive structure spans the first conductive structure and the second conductive structure. The first conductive structure and the second conductive structure each have a varying width along the lateral direction. Different voltages are applied to the third conductive structure according to the varying widths of the first conductive structure and the second conductive structure. |
| priorityDate |
2021-03-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |