http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114695345-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d6a6f422b091ba12ea61d4adbf1b0e8e |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0255 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0266 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0262 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02 |
| filingDate | 2022-03-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_44a853920ed1a3d5e723b5a00ed38fa4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9f0b4525745d42f03468617f4d18b03d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6570fb3b7079d3102ec5a6dfbffec384 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b230d5d7ffe9ecc3ee374861472f5044 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_59411f8ed7a68bea0c04111e859bb736 |
| publicationDate | 2022-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-114695345-A |
| titleOfInvention | A thyristor electrostatic protection device for integrated circuits |
| abstract | The invention discloses a thyristor electrostatic protection device for an integrated circuit, which includes a substrate and a device region arranged on the substrate. The device region includes an N-well and a P-well arranged adjacently, and a n-well is arranged in the N-well. An N+ implantation region, a first P+ implantation region and a second P+ implantation region, a second N+ implantation region, a third N+ implantation region and a third P+ implantation region are arranged in the P well, and a first polycrystalline Silicon and the second polysilicon, the first polysilicon and the first P+ implantation region, the N well, and the second P+ implantation region constitute a PMOS transistor; the second polysilicon and the second N+ implantation region, the P well, and the third N+ The injection area constitutes an NMOS tube; the first P+ injection area, the first polysilicon, and the second N+ injection area are connected by metal wires and connected to the electrical anode; the second P+ injection area, the second polysilicon, and the third N+ injection area They are connected through metal wires and connected to the electrical cathode; the first N+ injection area and the third P+ injection area are connected through metal wires. |
| priorityDate | 2022-03-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID5461123 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419559541 |
Total number of triples: 19.