| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_13fb6603aca1f446180b23a054566425 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0483
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-32 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0658
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0679
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1084
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1057
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1063 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-22 |
| filingDate |
2021-12-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_91c1bbefb1beb36155c87645ed764168
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_90ac290de0311e5553287d12e3b8e979
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0221a439825fac1b0e001cd752571ed4 |
| publicationDate |
2022-06-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-114596888-A |
| titleOfInvention |
Memory device, memory system, and method of operation of the memory system |
| abstract |
A memory device comprising: a plurality of non-volatile memory chips, each non-volatile memory chip including a status output pin; and a buffer chip configured to receive instructions from the status output pin indicating the plurality of non-volatile memory chips a plurality of internal state signals of the state of the volatile memory chip and outputting an external state signal with a set period based on the internal state signal indicating a specific state, wherein, in the first section of the external state signal with the set period, The duty ratio of the external state signal is determined depending on an identification (ID) of a nonvolatile memory chip among the plurality of nonvolatile memory chips that outputs an internal state signal indicating the specific state. |
| priorityDate |
2020-12-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |