| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_355555c24076b659de494363997bd57d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76883
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76885 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76871
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76883
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5226
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76885
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7681
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76846 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate |
2020-09-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_670ecfd1e6ada89eb0cba0be5631c0ce
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_06b90200ddf706c9304ed9b05b27bb37
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_281c0a1bf3de838558adac3477b53db5 |
| publicationDate |
2022-06-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-114586142-A |
| titleOfInvention |
Methods and related devices and systems for forming microelectronic devices with self-aligned interconnects |
| abstract |
A method for forming a microelectronic device includes forming interconnects that are self-aligned with both lower and upper conductive structures. At least one lateral dimension of the interconnect is defined when subtractively patterning the lower conductive structure and the first sacrificial material. At least another lateral dimension of the interconnect is defined by patterning the second sacrificial material, or by openings formed in the dielectric material through which the interconnect will extend. removing and replacing a portion of the first sacrificial material and the second sacrificial material exposed within the opening through the dielectric material with a conductive material to integrally form the interconnect and the upper conductive material structure. The interconnect occupies a volume between vertically overlapping regions of the lower and upper conductive structures, wherein such overlapping regions coincide with the openings through the dielectric material. |
| priorityDate |
2019-10-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |