| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1b481a472ff64fb0f259888b923432c4 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-211
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-1205 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-945
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-19
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-13
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-0385
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76847
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-642
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-37
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-09
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-0387
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-60
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5223
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76831 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-64
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate |
2021-09-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_163cc1e8fde4f661ca557466365ccd75
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_276a454906508f80f04efc023870d07b |
| publicationDate |
2022-06-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-114582821-A |
| titleOfInvention |
Semiconductor element with decoupling unit and method of making the same |
| abstract |
The present disclosure provides a semiconductor device with a decoupling unit and a method for fabricating the same. The semiconductor device has a substrate including an array area and a surrounding area, the surrounding area is disposed adjacent to the array area; a first decoupling unit is located in the surrounding area of the substrate; a memory unit is located in the surrounding area of the substrate in the array area; a redistribution structure located on the peripheral area of the substrate and the array area; an intermediate isolation layer located on the redistribution structure in the peripheral area; and an upper conductive layer located on the intermediate isolation layer superior. The redistribution structure on the surrounding area, the intermediate isolation layer and the upper conductive layer are configured together as a second decoupling unit. |
| priorityDate |
2020-12-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |