http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114496029-A

Outgoing Links

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filingDate 2021-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_01767026fe6eac5eb4949982a2f37422
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publicationDate 2022-05-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-114496029-A
titleOfInvention A memory and method of use
abstract The present application discloses a memory and a method of using the memory. On the basis of retaining the input and output ports integrated with a first sense amplifier and a write drive circuit on one side of the memory unit, the memory also adds at least one on the other side of the memory unit. A second sense amplifier and at least one read drive circuit; wherein, each bit line in each memory cell in the memory cell array is connected with a second sense amplifier one-to-one, and the other end of the second sense amplifier is connected to the read drive circuit circuit connection. Since each bit line in each memory cell in the memory cell array is connected with a second sense amplifier, the data in the bit where the bit line is located can be read through each second sense amplifier without interfering with each other. In this way, a large amount of data can be read in parallel (as many bits of data can be read at the same time), which is especially suitable for high-bandwidth read and low-bandwidth write application scenarios.
priorityDate 2021-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 23.