http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114429990-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_35c057a2d73ae88b28d28f9bb2a08715 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f7cbf6a1a55b84ca15e7f7de42102989 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42356 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66803 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate | 2020-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_aa2724d7d3cbc22ae4d7802ee5d5b2af http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e5cb88199037a5789426cb591c87877f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_90488e4a39c34e10c6f9a7afbca0f0ba |
| publicationDate | 2022-05-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-114429990-A |
| titleOfInvention | Semiconductor structure and method of forming the same |
| abstract | A semiconductor structure and a method for forming the same, comprising: providing a substrate; forming a first dielectric layer, a plurality of gate structures located in the first dielectric layer, and spacers located on the sidewalls of the gate structure on the substrate, and A source-drain structure is formed in the substrate on both sides of the gate structure, the first dielectric layer is also located on the surface of the source-drain structure, and the sidewall spacers include a first region and a second region located on the first region; After the sidewall spacers are formed, the first dielectric layer is etched, a plurality of conductive openings are formed in the first dielectric layer, the conductive openings expose the surface of the source-drain structure, and the first dielectric layer is etched In the process of the dielectric layer, the etching rate of the sidewall spacers of the second region is lower than the etching rate of the sidewall spacers of the first region; and a conductive structure is formed in the conductive opening. Thus, the reliability of the semiconductor structure is improved. |
| priorityDate | 2020-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 43.