http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114429989-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b331f41477a54823f1f9a5aa5bd8d4b5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3b3fb3edfbd1ab2b4b517c0a771d8b03 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0603 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66477 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42356 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0684 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
filingDate | 2020-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_928c646f0f89964880438895d02a459d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_faec8805c2d1a9160dec365c026f949c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3d45f91a6b46686d08f447d2a3bf5594 |
publicationDate | 2022-05-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-114429989-A |
titleOfInvention | A kind of narrow bandgap semiconductor device and preparation method thereof |
abstract | The invention provides a narrow bandgap semiconductor device with high switching ratio and a manufacturing method thereof. The device has a supporting substrate on which a narrow bandgap semiconductor layer, a gate dielectric layer and a gate stack structure are sequentially arranged. The gate stack structure is provided with an L-shaped self-aligned spacer on both sides, and the horizontal portion of the gate stack structure is connected to the The gate dielectric layer thereunder extends for a certain length to the outer source region and the drain region respectively along the plane where the narrow band gap semiconductor layer is located. Further, metal is deposited on the horizontal portion outside the spacer and on the narrow-bandgap semiconductor layer, the latter serving as a source electrode and a drain electrode of the semiconductor device. The device forms sidewalls through a gate self-alignment process, which can reduce the electric field strength at the junction between the channel and the source-drain region, thereby increasing the width of the tunneling barrier between the drain terminal and the band, making it work under a large bias voltage. The reverse tunneling of the drain terminal minority can be better suppressed, so the switching ratio can be increased while maintaining the high performance of the narrow-bandgap semiconductor device, and bipolarity can be significantly suppressed. |
priorityDate | 2020-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 81.