| abstract |
According to various aspects, there is provided a memory cell comprising: a capacitive memory structure; and a field effect transistor structure including gate isolation; wherein the capacitive memory structure and the field effect transistor structure are coupled to each other to form a capacitive voltage divider, wherein, The gate isolation includes at least one gate isolation layer, the at least one gate isolation layer includes a material having a dielectric constant greater than 4, and wherein the at least one gate isolation layer has a thickness ranging from 3 nm to 10 nm. |